Tegra186: mce: get the "right" uncore command/response bits

This patch corrects the logic to read the uncore command/response bits
from the command/response values. The previous logic tapped into incorrect
bits leading to garbage counter values.

Change-Id: Ib8327ca3cb3d2086bb268e9a5366865cdf35b493
Signed-off-by: Varun Wadekar <[email protected]>

diff --git a/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h b/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
index 96a5525a6be5bc7a9dd4dd20b1ab219fa4d98dc0..203f61a5d98278d512f82f8d70ae75b4a285e803 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
+++ b/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
@@ -64,19 +64,17 @@
 #define MCA_ARG_FINISH_MASK                    U(0xFF)
 
 /*******************************************************************************
- * Uncore PERFMON ARI struct
+ * Uncore PERFMON ARI macros
  ******************************************************************************/
 #define UNCORE_PERFMON_CMD_READ                        U(0)
 #define UNCORE_PERFMON_CMD_WRITE               U(1)
 
 #define UNCORE_PERFMON_CMD_MASK                        U(0xFF)
-#define UNCORE_PERFMON_CMD_SHIFT               U(24)
 #define UNCORE_PERFMON_UNIT_GRP_MASK           U(0xF)
 #define UNCORE_PERFMON_SELECTOR_MASK           U(0xF)
 #define UNCORE_PERFMON_REG_MASK                        U(0xFF)
 #define UNCORE_PERFMON_CTR_MASK                        U(0xFF)
 #define UNCORE_PERFMON_RESP_STATUS_MASK                U(0xFF)
-#define UNCORE_PERFMON_RESP_STATUS_SHIFT       U(24)
 
 /*******************************************************************************
  * Structure populated by arch specific code to export routines which perform

diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
index 602a0562d6909025ca634d8766745f2228a78509..a57bc11b9c86f1db287970b36f11d5258798af8a 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
@@ -503,7 +503,7 @@ int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req,
        uint32_t val, req_status;
        uint8_t req_cmd;
 
-       req_cmd = (uint8_t)(req >> UNCORE_PERFMON_CMD_SHIFT);
+       req_cmd = (uint8_t)(req & UNCORE_PERFMON_CMD_MASK);
 
        /* clean the previous response state */
        ari_clobber_response(ari_base);
@@ -533,7 +533,7 @@ int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req,
                         * For "read" commands get the data from the uncore
                         * perfmon registers
                         */
-                       req_status >>= UNCORE_PERFMON_RESP_STATUS_SHIFT;
+                       req_status &= UNCORE_PERFMON_RESP_STATUS_MASK;
                        if ((req_status == 0U) && (req_cmd == UNCORE_PERFMON_CMD_READ)) {
                                *data = ari_get_response_low(ari_base);
                        }